HME-P2 Family FPGA Features

• SRAM-based FPGA Fabric

  - 6-input Lookup Tables, up to 32K equivalent to 52K logic cells
  - DFF-based registers, up to 65,280

• Embedded Memory Block

  - 196 programmable dual-port DPRAM memory, 9Kb, totaling 1,764Kb
  

• Embedded DSPs block
  

  - 96 DSP (MAC) blocks, 18x18

  - or 384 10x10 DSP (MAC) blocks

• Clock Network
  

  - 32个de-skew global clocks
  

  - 1 OSC, ±5% freguency accuracy
  

  - 2 PLLs

  - dynamic clock management in system

• I/O

  - 3.3/2.5/1.8/1.5/1.2V LVTTL/LVCMOS常规I/O

  - programmable source synchronous I/O

  - emulated MIPI D-PHY, LVDS Rx, LVDS Tx, BLVDS

  - up to 1200 Mb/s per LVDS I/O

Memory

• Embedded SRAM Block
  - 2 SRAM, 4Kx32b，totaling 32KB

Package

- SFBGA256

- VBGA324

MCU

• ARM Cortex-M3 MCU
  - high performance 32-bit processor, frequency up to 300MHz
  - outstanding processing performance combined with fast interrupt handling

  - enhanced system debug with extensive breakpoint and trace capabilities
  - efficient processor core, system, and memories
  - single cycle multiplication, hardware divide
  - integrated sleep mode

•  Peripheral
  - 2 Timer
  - 1 Watch Dog Timer
  - 3 I2C interfaces
  - 3 SPI interfaces
  - 1 QSPI interface
  - 3 UART interface
  - 2 GPIOs 32-bit
  - 1 DMA
  

Notes:

(1) No hard FlFO.

(2) Two 18x18 can achieve 35x35, and one 18x18 can achieve four10x10.

(3) 72 pairs are analogue output LVDS.